Aviation Electronics Europe, ARINC653 & Multi-core Certification
Last week, I attended the Aviation Electronics Europe 2017 conference, which was held in Munich for the third consecutive year. It’s a popular location due to its excellent transport links, Bavarian cuisine, and of course weissbier.
The theme of this year’s conference was ‘Staying Ahead of the Competition in a Growth Market’, and the keynote presentations covered the evolution of aviation systems in the e-enabled world, and how policies and standards were evolving to address these changes in operation. The keynote talks were followed by deep-dive track presentations on avionic and air traffic management (ATM), safety certification standards and end-to-end connected aircraft. I particularly enjoyed the presentations on cyber security in relation to the connected aircraft, and how to protect connected aircraft from cyber-attack, and you can read more about this subject in Alex Wilson’s blog post ‘Securing the E-Enabled Aircraft’.
I presented a paper ‘Update on using multicore processors with a commercial ARINC 653 implementation’ in the technical workshop track ‘Multi-core, Software & Certification’ which covered the selection of multi-core processors for safety-critical avionics applications, particularly in relation to choosing an architecture which will enable multicore interference potential to be minimized. The paper also shares some insights into the design and implementation of VxWorks 653 on a multi-core processor architecture, and the use of Type-1 Hypervisor on processors which implement full hardware virtualization support. This provides two important benefits: firstly, the ability to host unmodified guest operating systems, enabling consolidation of legacy applications on an integrated modular avionics (IMA) platform; and secondly, the hardware virtualization and IOMMU support provides superior isolation and containment, as it prevents untrusted / uncertified drivers running in ARINC 653 partitions from performing DMA transfers outside of the partition memory regions enforced by the MMU.
The technical track also included a very interesting presentation by Prof. Christian Fraboul of University of Toulouse on research into the use of manycore processors in avionics applications, and optimization of system architecture to address the challenges of timing predictability and worst-case execution timing analysis (WCET).
In addition to the conference tracks, Aviation Electronics Europe also included a supplier exhibition, and one of the highlights for me was seeing and interacting with a safety-critical avionics touchscreen display which demonstrated the joint solution from CoreAvi, Presagis and Wind River. Being able to select, drag, and resize individual views with your fingertips reminded me of the movie Minority Report where Tom Cruise sweeps through multiple sources of information on a touchscreen wall. However, it’s one thing for Hollywood movie to do this with CGI in post-production, it’s quite another to do it for real on a safety-critical avionics display!