Is safety-critical ready for multi-core?
You may feel that you’re experiencing déjà vu reading this blog, but the title ‘Is safety-critical ready for multi-core?’ is different to an earlier blog, which was ‘Is multi-core ready for safety-critical?‘.
In the earlier blog,
I discussed some recent developments in multi-core processors in the
context of their suitability for use in safety-critical systems. In this blog,
I want to discuss how a particular type of safety-critical system could
exploit the capabilities of multi-core devices. However, before I dive
into the details, I should really outline the different types of
safety-critical systems (at least in the simple categories which I like