Partner Directory
Partner Product
Tsi301 (2401)
HyperTransport-to-PCI Bridge
Product Highlights
The Tsi301 is the first HyperTransport-to-PCI Bridge that interfaces the new generation of HyperTransport (HT) based microprocessors and microcontrollers to PCI-based peripherals. It also connects HT-based hosts to HT-based peripherals. The Tsi301 expands the possibilities for today’s system architects and designers by providing design options based on HyperTransport never possible before.
The Tsi301 breathes new life into systems which are encumbered by the limits of traditional PCI fabrics. It reduces the time to market, design complexity, and system costs of PCI and HT based systems.
Product Description
The Tsi301 supports 64-bit, 66-MHz PCI operations and implements two, bidirectional 8-bit HT interfaces that provide 800 Mbyte/s of bandwidth in each direction. Up to 31 devices can be daisy-chained to build higher capacity systems with multiple PCI busses and HT-based peripherals. A fairness algorithm allocates bandwidth among devices, thereby eliminating starvation of bridges at the end of the chain.
Web Links
- http://www.tundra.com/product_detail.aspx?id=1234
- http://www.tundra.com/product_detail.aspx?id=1236
Company Description
2401
<P>The Tsi301 is the first HyperTransport-to-PCI Bridge that interfaces the new generation of HyperTransport (HT) based microprocessors and microcontrollers to PCI-based peripherals. It also connects HT-based hosts to HT-based peripherals. The Tsi301 expands the possibilities for today’s system architects and designers by providing design options based on HyperTransport never possible before.</P>
<P><BR>The Tsi301 breathes new life into systems which are encumbered by the limits of traditional PCI fabrics. It reduces the time to market, design complexity, and system costs of PCI and HT based systems.</P>
Tsi301
The Tsi301 supports 64-bit, 66-MHz PCI operations and implements two, bidirectional 8-bit HT interfaces that provide 800 Mbyte/s of bandwidth in each direction. Up to 31 devices can be daisy-chained to build higher capacity systems with multiple PCI busses and HT-based peripherals. A fairness algorithm allocates bandwidth among devices, thereby eliminating starvation of bridges at the end of the chain.
NO
hardware
HyperTransport-to-PCI Bridge
More Information
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