Wind River Workbench, On-Chip Debugging Edition, offers the industry's most complete end-to-end development environment for on-chip debugging. Workbench On-Chip Debugging takes you from early hardware bring-up to test and manufacturing with a centralized development solution. The advanced hardware diagnostics and patent-pending multicore debugging capabilities help you unlock the power of semiconductor technology.
Centralized Debugging and Analysis
Workbench On-Chip Debugging provides a centralized, standards-based development environment that automates the debugging and analysis process. Its project-oriented methodology simplifies the handoff between various phases of development, from initial hardware bring-up to firmware design, OS implementations, and platform and application development. The hardware diagnostics, flash programming, and scripting capabilities of Workbench On-Chip Debugging expedite initial development phases. The Workbench On-Chip Debugging API and Utility allow manufacturing and test engineers to employ the same Wind River ICE and Wind River Probe hardware used in hardware development, as well as leverage existing tools throughout the design and implementation process.
Powerful Eclipse-Based Environment
Workbench On-Chip Debugging software is based on the Eclipse framework, providing the DSO industry's only integrated JTAG debugging environment that can be easily extended through in-house, third-party, open-source, or commercially available Eclipse plug-ins. Wind River on-chip debugging solutions enable you to take advantage of the growing Eclipse ecosystem to improve collaboration between hardware, firmware, and software developers, ensuring a smooth handoff in the debug process.
Advanced Hardware Diagnostics
The traditional hardware diagnostics process can be time-consuming and requires detailed knowledge of processor technology and multiple debug tools. As you move from debugging single core 8-bit and 16-bit processors to multicore 32-bit or 64-bit processors, you need a more innovative hardware diagnostic toolset that supports a wide range of advanced processors. Workbench On-Chip Debugging was designed for these complex SoC microprocessors, and you don't need to rely on the availability of target firmware—all hardware initialization is performed by the emulator via the processors' JTAG interface.
Scalable, Robust On-Chip Debugging
Workbench On-Chip Debugging introduces patent-pending technology that solves one of the biggest challenges of embedded software development in a multicore environment: diagnosing and analyzing embedded application behavior across multiple processors on a single board, or across multiple boards within a system.
This sophisticated debugging software supports up to eight separate cores, enabling you to synchronize the start and stop of multiple cores from a central location. You can also easily visualize each core and its debug information to quickly locate and isolate problems. Additional breakpoint management enables cross-correlation of breakpoints to stop a specific processor—or even the entire system—when the breakpoint is hit. Combined with error tracking and cache management, this provides the most sophisticated on-chip debugging solution for multicore environments.
Features
- Advanced symbolic debugging with conditional breakpoint support
- Comprehensive diagnostics-RAM Tests, Address Bus Test, Data Bus Test, CRC Checks, and Scope Loops-for bus routing issues on densely populated boards using a single JTAG debug tool
- Register analysis and access to bit-level detail and user documentation
- Complete run-control solution, including start, stop, and stepping capabilities, which support data- and expression-based hardware and software breakpoints
- Profile analysis tools that report the time your code spent executing a function
- Multicore debugging in a variety of configurations, including multiple cores within a system running different OSes
- Support for multiple OSes, including Linux with OS Object Awareness, without kernel instrumentation or software agents running on the target
- Internal and external trace capabilities that dramatically reduce debug time by providing the underlying cause of specific defects
