Partner Product

RIOC 4065  (57)
PowerPC-Based, Real-Time CompactPCI Computing Platform

The RIOC 4065 is a CPCI processor board equipped with the latest PowerPC 750/7400 CPU running at the maximum available speed. It includes a 2MB backside L2 cache. The board can be equipped with a maximum of 1GB of SDRAM and offers 16MB of flash EPROM.



Two PCI buses are attached to the CPU bus. One drives the board's on-board PCI resources, including the two on-board PMC slots. The other bus is routed to the J3 connector to extend the number of PMCs controlled by the same CPU to a maximum of 10 (using CES PEB boards).



CES has designed its own PowerPC-to-PCI and PowerPC-to-CompactPCI bridges to overcome limitations of devices found on the market and to optimize performance and integration in the global architecture of the board. CES provides the user with total control of the bandwidth on the different buses.



The RIOC is designed for real-time multiprocessing applications that require hot swap and high availability. It supports both system and peripheral slot functions.



The CES BP-Net is available over PCI and CPCI to allow clusters of processors to distribute tasks, synchronize processes, and exchange messages at a very high speed. TCP/IP is supported.

57
<UL> <LI>PowerPC G3 (750) or G4 (74xx)/dual independent 64-bit PCI</LI> <LI>CompactPCI system/peripheral slot; 160MB/sec. DMA on CompactPCI</LI> <LI>Up to 1GB of SDRAM, 2MB of L2 BS cache, 16MB of FEPROM</LI> <LI>2 to 10 PMC slots, 100Mb/sec. Ethernet, RS-232</LI> <LI>Supports the CES multiprocessor extension package<BR></LI></UL>
RIOC 4065
The RIOC 4065 is a CPCI processor board equipped with the latest PowerPC 750/7400 CPU running at the maximum available speed. It includes a 2MB backside L2 cache. The board can be equipped with a maximum of 1GB of SDRAM and offers 16MB of flash EPROM. Two PCI buses are attached to the CPU bus. One drives the board's on-board PCI resources, including the two on-board PMC slots. The other bus is routed to the J3 connector to extend the number of PMCs controlled by the same CPU to a maximum of 10 (using CES PEB boards). CES has designed its own PowerPC-to-PCI and PowerPC-to-CompactPCI bridges to overcome limitations of devices found on the market and to optimize performance and integration in the global architecture of the board. CES provides the user with total control of the bandwidth on the different buses. The RIOC is designed for real-time multiprocessing applications that require hot swap and high availability. It supports both system and peripheral slot functions. The CES BP-Net is available over PCI and CPCI to allow clusters of processors to distribute tasks, synchronize processes, and exchange messages at a very high speed. TCP/IP is supported.
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hardware
PowerPC-Based, Real-Time CompactPCI Computing Platform