visionTRACE

To cut costs and improve performance in device development, silicon vendors are incorporating peripherals that used to be external to the microprocessor chip into the same silicon as the microprocessor itself, resulting in what is now referred to as an SOC, or System on Chip. With key components like cache memory, the memory bus controller, and the system bus controller inside the silicon, it becomes increasingly difficult to rely on legacy debugging tools like logic analyzers to troubleshoot a device's hardware system. As a solution, silicon manufacturers have begun to provide Trace interfaces on their SOCs, allowing access to instruction execution and, in some cases, data execution, as well as information on variables and access to memory.

visionTRACE is an upgradeable extension to Wind River's visionICE II hardware emulator, whereby visionICE II's existing personality module is replaced with the visionTRACE personality module. Once integrated with visionICE II, visionTRACE provides visibility to instruction and data execution on the Freescale MPC5xx family for up to 300,000 lines of code, even if the code is executed out of cache memory. For other processors that support external Trace capabilities, please visit our Wind River Trace product page.

Technical Specifications

System Requirements

Supported Hosts*

  • Freescale PowerPC (Nexus)
  • MPC561
  • MPC563
  • MPC565

* For current target availability, please contact your Wind River sales representative.

Features

  • Real-time target control
  • Real-time trace buffer
  • Modular hardware design
  • More than 300,000 lines of code execution trace
  • Improved statistical performance analysis

Benefits

  • A non-intrusive interface for tracing code execution in real-time
  • Configurable trace capture for program, data, or ownership trace messages, or any combination
  • Configurable data tracing for capturing data reads, writes, or both over two configurable address ranges
  • Using the PPC56x Nexus internal watchpoints, configurable filtered trace capture to enable and disable the trace capture non-intrusively; this allows the capture of only specified address ranges of program execution
  • Ability to capture real-time trace information with the PPC56x Nexus trace clock running at up to 40 Mhz
  • A 512KB buffer memory that can display up to 300,000 lines of assembly code when configured to capture only program trace messages; or it can display 50,000+ lines of assembly code and 12,000+ lines of data reads and writes when configured to capture both program and data trace messages
  • Ability to capture trace messages anytime the PPC56x Nexus processor is running code, even while stepping through code
  • Connection of the target to the 40 or 50-pin Nexus interface connector by means of a 7-inch flex cable, to eliminate component interference problems

 

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